Semiconductor packaging
Aptasic offers a large panel of packaging solutions from low volume to mass production. Including, from bare die assembly (as WLCSP) , through open cavity packages to high volume QFN.
Packages for Prototyping
Open package families
Plastic open cavity packages: DFN, QFN, TQFP, LQFP, SOICN, SOIC-W, SSOP
Packages for Mass Production
Laminate substrate packages
JLCC, LCC, LDCC, QFP, PDIP, PGA, TO, SOIC
Discrete package families
SOT-23, SOTI43, SC70, TSOT, SOT666, SOT223, TO-92, SOT89, SOT323
Ceramic packages
JLCC, LCC, LDCC, QFP, PDIP, PGA, TO, SOIC
Standard package families
Lead-less packages: DFN, QFN Leaded packages: QFP, TQFP, LQFP, MSOP, QSOP, SOICN, SOIC-W, TSSOP-4.4, TSSOP-6.1, SSOP PDIP, PLCC
Specific packages
TO-220, DDPACK, Clear pkgs, PSOP
Multi die packages
Stacked, Flip, chipped, Multi chips System in Package (SIP) with Chips and passive components. Package on / in package
Wafer Level Chip Scale (WLCS)
Specific custom package development
- Wafer Level Chip Scale Packages (WLCSP) with servie like RDL, re-passivation and various types of bumps
- Wafer molding process services
- PCBA and COB modules
- Single services like: back-grinding, sawing, Tape&Reel, visual inspection
Wafer Level Package
- Wafer inspection
- RDL Redistribution
- UBM Under Bump Metallization
- Bumping
Wafer Level Test
- Wafer level probing
- Cantilever or vertical probing
- Wafer sort
Back-end and conditioning
- Back grinding
- Laser marking (optional)
- Wafer singulation, sawing
- Tape & Reel, waffle pack or wafer on blue tape
- AOI (automatic inspection)